CoreBoot 4.12 is here and comes with support for 49 boards and more

After half a year from the last version announced, the release of the new version of CoreBoot 4.12 was announced in which a series of improvements were added such as greater support, elimination of obsolete code and more.

For those who are unfamiliar with CoreBoot, you should know that this is an open source alternative to the traditional Basic I / O System (BIOS) that was already on MS-DOS 80s PCs and replacing it with UEFI (Unified Extensible). CoreBoot is also a free proprietary firmware analog and is available for full verification and auditing. CoreBoot is used as the base firmware for hardware initialization and boot coordination.

Including graphics chip initialization, PCIe, SATA, USB, RS232. At the same time, the binary FSP 2.0 (Intel Firmware Support Package) components and the binary firmware for the Intel ME subsystem, which are required to initialize and launch the CPU and chipset, are integrated into CoreBoot.

What's new in CoreBoot 4.12?

In this new version of CoreBoot 4.12, 190 developers participated and prepared 2692 changes of which the most important are the following.

In Coreboot 4.12 added support for 49 motherboards, most of which are used on Chrome OS devices.

While on the other hand support for 51 motherboards was removed, whose elimination is mainly related to the end of support for obsolete plates and work to eliminate duplicates similar board options. Many boards, which were previously presented as separate models, are combined into sets (variant), in which one module immediately covers the entire device family.

The code to support the platforms AMDFAM10, VIA VX900 and FSP1.0 (BROADWELL_DE, FSP_BAYTRAIL, RANGELEY), that do not meet the new requirements, has been excluded from the code base principal. For example, in FSP1.0 it is not possible to implement the POSTCAR stage.

Taking into account the cleaning of duplicates, despite the fact that formally the number of removed boards exceeds the number of added, the list of compatible equipment has increased. The new version also made a lot of changes related to the improved support for devices that come with OEM firmware, including those based on Coreboot.

In addition to continuing to clean up the code base, volume notes on licenses in file headers have been replaced with short SPDX identifiers. The names of all the authors who participated in the development are collected in the AUTHORS file. The header files were revised to minimize the code covered during the assembly of each assembly unit.

The SMMSTORE Flash Drive Controller is recognized as ready for widespread use. The controller uses SMM (System Management Mode) mode to write, read and erase areas in flash memory, and can be used in OS or firmware components to organize permanent storage of settings, without the need to implement a controller specific to each platform.

Unit testing tools have been expanded, which integrate with the new build system and carry over to using the Cmocka framework. A separate tests / directory has been created in the source tree for unit tests.

Components now required for x86 systems include RELOCATABLE_RAMSTAGE, POSTCAR_STAGE, and C_ENVIRONMENT_BOOTBLOCK. RELOCATABLE_RAMSTAGE which allow ramstage to be moved to another memory area at runtime that does not overlap with the operating system or payload drivers (the move is necessary as ramstage is cached in CBMEM for faster loading when exiting the standby mode).

POSTCAR_STAGE used to switch from CAR (Cache-As-Ram) to running code from DRAM. C_ENVIRONMENT_BOOTBLOCK allows to use bootblock compiled using regular GCC, instead of a specialized romcc compiler.

Get CoreBoot

Finally, for those interested in being able to obtain this new version of CoreBoot they can do it from their download section, which can be found on the official website of the project.

In addition to that in it they will be able to find documentation and more information about the project.

The link is this.

The content of the article adheres to our principles of editorial ethics. To report an error click here!.

Be the first to comment

Leave a Comment

Your email address will not be published. Required fields are marked with *



  1. Responsible for the data: AB Internet Networks 2008 SL
  2. Purpose of the data: Control SPAM, comment management.
  3. Legitimation: Your consent
  4. Communication of the data: The data will not be communicated to third parties except by legal obligation.
  5. Data storage: Database hosted by Occentus Networks (EU)
  6. Rights: At any time you can limit, recover and delete your information.