I-XiangShan, iprosesa yase-China ye-RISC-V egqitha iCortex-A75

Zimbalwa iintsuku ezidlulileyo iZiko lobuChwepheshe boLwazi lweTshayina lezeNzululwazi lityhilwe iprojekthi IXiangShan, apho ibiphuhliswa khona ukusukela nge2020 Inkqubo ephezulu yokusebenza evulekileyo esekwe kwi-RISC-V (RV64GC) yokusetha uyilo kunye nokusebenza kwayo kufikelela kwisantya seSiFive's Performance P550 engundoqo.

Ngokutsho kwabaphuhlisi, I-RISC-V cores esekwe kwiXiangshan CPU iya kuba yinto ethandwayo phakathi kwabaqulunqi beeprosesa ezinje ngeLinux yeenkqubo zokusebenza. I-Xiangshan iyakwenziwa kusetyenziswa itekhnoloji yenkqubo ye-28nm yi-TSMC yaseTaiwan (ngaphandle kokuba isohlwayo sinyanzeliswa yi-United States) kwaye esi iya kuba sisizukulwana sokuqala seekhowudi ezibizwa ngokuba yiYanqi Lake.

RISC-V ibonelela ngenkqubo yemiyalelo yomatshini evulekileyo kunye nokuguquguquka ekuvumela ukuba wenze ii-microprocessors zezicelo ezingenakuphikiswa ngaphandle kokufuna imirhumo okanye ukubeka iimeko zokusetyenziswa. I-RISC-V ikuvumela ukuba wenze ii-SoCs ezivulekileyo kunye neeprosesa.

Okwangoku, ngokusekwe kwinkcazo ye-RISC-V, iinkampani ezininzi kunye noluntu oluphantsi kwamaphepha-mvume asimahla (i-BSD, i-MIT, i-Apache 2.0) iphuhlisa iintlobo ngeentlobo zezinto esele zenziwe ze-microprocessor cores, ii-SoCs kunye neetshipsi.

Malunga neXiangShan

Le projekthi ipapashiwe phantsi kwenkcazo yeebhloko zehardware kulwimi lweChisel, eguqulelwa kwiVerilog, ukumiliselwa kwesalathiso esekwe kwi-FPGA kunye nemifanekiso yokulinganisa ukusebenza kwe-chip kwi-Verilog simulator evulekileyo.

“Nangona injongo yethu yexesha elide ukuya phambili kukuhambelana ne- [Cortex-] A76, isaqhubeka. Sidinga ukwenziwa kokuphindaphindeka emhlabeni. Injongo yophuhliso lwe-agile ayikokugqitha ikona. Amava aqokelelwe yi-Intel kunye nengalo kule minyaka idlulileyo, nathi kufuneka siqokelele kancinci.

I-Schematics kunye neenkcazo zokwakha ziyafumaneka (ngaphezulu kwamaxwebhu angama-400 kunye nama-50 amawaka emigca yekhowudi iyonke), kodwa uninzi lwamaxwebhu asesiTshayina, kunye neDebian isetyenziswa njengenkqubo yokusebenza yesalathiso ukuvavanya ukuphunyezwa kwe-FPGA.

I-XiangShan ibanga ukuba yeyona nto iphambili i-RISC-V chip, igqwesa iSiFive P550. Iimvavanyo ze-FPGA zicwangciselwe ukugqitywa kule nyanga kunye negama lekhowudi "ILake yeYanqi" yiprototype chip eyi-8-core esebenza kwi-1,3 GHz Kwaye yenziwa kwi-TSMC kusetyenziswa inkqubo yetekhnoloji evela 28 nm.

"Sinethemba lokuba uXiangShan angaphila iminyaka engama-30," utshilo u-Bao, uguqulelwe, kwintetho yakutshanje ngeprojekthi. “Sinesivumelwano sokuhlangana kwakhona kwiminyaka engama-30 kwaye emva koko sibone ukuba iXiangShan izakuba yintoni. Nangona kunjalo, ukufezekisa lo mnqweno, kusekho iingxaki kunye nemiceli mngeni efuna ukusonjululwa.

Isicatshulwa ibandakanya i-2MB cache, isilawuli senkumbulo nge Inkxaso yememori ye-DDR4 (ukuya kuthi ga kwi-32 GB ye-RAM) kunye ne-PCIe-3.0-x4 interface.

Ukusebenza kwe-chip yokuqala kwi-benchmark ye-SPEC2006 kuqikelelwa kwi-7 / Ghz, ehambelana ne-ARM Cortex-A72 kunye neetshipsi zeCortex-A73.

"Inkqubo yoyilo lwe-agile kunye neqonga ebesilakhe ngaphambili lixhasa iqela lophuhliso labantu abangaphezulu kwama-20, nokude ngokwaneleyo," utshilo uBao. "Into ekufuneka siyithathele ingqalelo ngoku yindlela yokwakha inkqubo evulekileyo, evulekileyo nevulekileyo yemithombo evulekileyo enokuxhasa ukukhula komthombo ovulekileyo woluntu lwabantu abangama-2000 XNUMX."

Ukuphela konyaka kucwangcisiwe ukuveliswa kweprototype yesibini "ISouth Lake" enokwakhiwa okuphuculweyo, eya kuthi iveliswe yi-SMIC ngenkqubo yetekhnoloji ye-14nm kunye nokwanda rhoqo ukuya kwi-2 GHz.

Iprototype yesibini kulindeleke ukuba ifezekise ukusebenza kwe-10 / Ghz kwibhentshi ye-SPEC2006, ekufutshane ne-ARM Cortex-A76 kunye neeprosesa ze-Intel Core i9-10900K, kunye ne-SiFive P550, eyona CPU ikhawulezayo ye-RISC-V kwi-8.65 / Ghz.

Okokugqibela, ukuba unomdla wokwazi okungakumbi ngayo, unokujonga ikhowudi yemvelaphi yeXiangShan, epapashwe phantsi kwe MulanPSL2, KwiGitHub.

Umthombo: https://www.zhihu.com