Ofungiyar masu sha'awar (tare da gudummawa daga Pixilica) suna haɓaka aikin BAWXX, que da nufin ƙirƙirar saitin ƙarin 3D zane-zane da umarnin sarrafa multimedia waɗanda za a iya amfani da su don haɗa ayyukan GPU akan masu sarrafa RISC-V.
An sanya aikin a matsayin kyauta, Ba ya buƙatar sarauta kuma ba sharuɗan amfani, yana ba ku damar ƙirƙirar cikakken GPUs na RV64X.
Abokan haɗin Pixilica tare da RV64X don ba da shawarar sabon saiti na umarnin zane-zane wanda aka tsara don zane-zanen 3D da aikin watsa labarai. Yana iya zama hade ISA CPU-GPU.
Waɗannan sabbin umarnin sun dogara ne akan tsarin koyarwar vector mai tushe na RISC-V. Zasu ƙara tallafi don sabbin nau'ikan bayanai waɗanda ke ƙayyadaddun zane-zane azaman haɓakawa a cikin ruhun kwayar RISC-V ISA.
Game da RV64X
Saukewa: RV64X ya dogara ne da umarnin vector na RISC-V ISA, waɗanda aka haɓaka tare da tallafi don sababbin nau'ikan bayanai da ƙarin takamaiman ginshiƙi.
Misali, ana samarda karin ayyuka don sarrafa pixels (RGBA), dige (xyzw), abubuwa masu laushi (UVW-Texels), vectors (ayyuka tare da abubuwa 2-4), sigogin kayan aiki, lissafin hasken wuta, lissafi mai wuce gona da iri, zurfin buffers (Z - buffer) da maɓallin ɓoye (Framebuffer).
Samfurin farko An tsara GPU mai tushen RV64X don amfani a cikin microcontrollers kuma za a iyakance shi don tallafawa API na Vulkan, kodayake akan lokaci, sunyi alƙawarin ƙara tallafi don OpenGL da DirectX.
Babban dalili domin ci gaba shine buƙatar gine mai sassauƙa wanda zai ba da damar haɗawar kari don magance takamaiman matsaloli yadda yakamata, kamar yanke taku biyu na cones, amfani da sauri Fourier yana canzawa don zurfin zurfin launi, da aiwatar da kayan aikin SLAM.
Alal misali, RV64X yana ba da izinin aiwatar da nasa matakan don bututun lissafi, lissafi, pixel da firam buffers, kazalika da ƙirƙirar naka tessellators.
Haka kuma an ambata cewa tare da RV64X, masu kirkirar chipm za su iya shirya hanyoyin magance matsalolin da suke buƙata bisa ƙashin baya, suna mai da hankali kan ƙwarewar ci gaba, ba tare da ɓata lokaci kan abubuwan gama gari ba.
RV64X yana canzawa azaman haɗin CPU-GPU ISA, ba da damar ƙirƙirar ƙwararrun masanan microcontrollers da masu sarrafa abubuwa da yawa waɗanda ke haɗu da ƙididdigar lissafi tare da toshe don aiwatar da ayyukan zane-zane.
Mai sarrafawa wanda ya haɗu da ainihin RISC-V tare da toshe na GPU yayi kama da guda ɗaya (babu taswirar GPU a bayyane) kuma ana tsara ta ta amfani da hadadden tsarin koyarwa 64 da samfurin SIMD don daidaiton bayanan bayanai. Tsarin gine-ginen RV64X yana canzawa zuwa ga daidaitaccen ingantaccen aiwatarwa wanda za'a iya aiwatar dashi akan FPGAs da ASICs.
Mabudin buɗe tushen da ya canza cigaban software yana samun nasara tsakanin masu haɓaka kayan masarufi. Effortsoƙarin farko da aka mai da hankali kan gine-ginen RISC-V suna kan gaba. Muna bincika alƙawarin da haɗarurruka na haɓaka kayan masarufi a cikin Gabanmu na Musamman na Bude Source na gaba.
Daga cikin siffofin na gine-ginen RV64X ana amfani da samfurin ƙwaƙwalwar ajiya ɗaya akan CPU da GPU, wanda ke kawar da ƙarin hanyoyin RPC / IPC don fassara kira tsakanin ƙwaƙwalwar GPU da CPU lokacin aiwatar da ayyukan 3D API.
Ana iya aiwatar da daidaitattun ayyukan zane a matakin microcode. Kirkirar kayan kwalliyar kwalliya, rasterizers, da haɓakar faɗin rayi yana tallafawa. Bugu da ƙari, ana iya aiwatar da ayyukan vector a matakin microcode don magance kwaikwaiyo, hangen nesa na kwamfuta, da matsalolin koyo na na'ura.
Bayanin aiwatarwa RV64X ya haɗa da ɓoye 1 KB L32 don umarni da bayanai, 8 KB SRAM don microcode, decoder na koyarwa, aiwatar da kayan masarufi na RV32V da RV64X umarnin koyarwa, microcode da aka ayyana fadada decoder, vector arithmetic logic unit (ALU), 136-bit rajistar file with 1024 elements, a Special Action Unit (SFU), a Texture Unit and a Mai iya daidaitawa na gida.
A ƙarshe, idan kanaso ka kara sani game dashi zaku iya bincika bayanan a cikin asalin gidan. Haɗin haɗin shine wannan.