Coreboot (previously called LinuxBIOS) is a project aimed at replacing non-free firmware in proprietary BIOS
The new version of Coreboot 4.20 was released a few days ago and in this release they have made a lots of changes which are focused on improving features already implemented, as well as security improvements, compatibility improvements and also support improvements for both already supported boards and new boards.
For those who are unfamiliar with CoreBoot, you should know that this is an open source alternative to the traditional Basic I / O System (BIOS) that was already on MS-DOS 80s PCs and replacing it with UEFI (Unified Extensible). CoreBoot is also a free proprietary firmware analog and is available for full verification and auditing. CoreBoot is used as the base firmware for hardware initialization and boot coordination.
Including graphics chip initialization, PCIe, SATA, USB, RS232. At the same time, the binary FSP 2.0 (Intel Firmware Support Package) components and the binary firmware for the Intel ME subsystem, which are required to initialize and launch the CPU and chipset, are integrated into CoreBoot.
Main new features of CoreBoot 4.20
In this new version of Coreboot 4.20 that is presents the work of about 1600 confirmations since the previous release and which represents the cleanup work and continuous improvements implemented.
Of the changes that stand out in this new version is that cpu/mp_init.c enables CPUs once they run code, plus cpu/x86/smm adds PCI resource storage functionality
Besides that, the SMM runtime ensures that PCI resources are stored in SMRAM memory security to prevent attacks that lead to the leakage of sensitive data through tampering with PCI BAR remapping.
Another change that stands out in this new version is that added a driver to read and write EFI variables stored in a separate memory area. This is particularly useful for EDK2 as a payload and allows existing EFI tools to be reused to set/get options used by the firmware.
I also knowe added EWL controller (improved warning logging) to handle Intel EWL HOB errors, as well as what added DDR2 memory support to code for Intel GM45, added inteltool support for the Intel "Emmitsburg" PCH, added Sound-Open-Firmware drivers for Chromebooks to support sound on systems, and added SimNow console logging support for AMD.
Moreover, Yabits payload was removed with which it becomes obsolete and archived, as well as it is also highlighted that fixed superiotool build issues using musl-libc, implemented initial work on Xeon SPR, removed Zephyr SDK support from coreboot-sdk as the packaged version was quite old and not really used and also added inteltool support for Intel PCH “Emmitsburg ”.
It is mentioned that work was done to improve the percentage of cache hits when rebuilding using ccache, as well as improvements and expansion of the ACPI generation code and that Fixed some issues for RISC-V code.
Finally, it is also worth mentioning that in this new release, added support for 25 motherboards, 11 of which are used on Chrome OS devices or web servers.
- Asrock: B75M-ITX
- Dell: Latitude E6400
- Google: Aurash
- Google: Boxy
- Google: Constitution
- Google:Gothrax
- Google: Hades
- Google:Myst
- Google: Screenbo
- Google: Starmie
- Google: Taranza
- Google: Uldren
- Google: Yavilla
- HP: EliteBook 2170p
- Intel: Archer City CRB
- Intel: DQ67SW
- Protectli: VP2420
- Protectli: VP4630/VP4650
- Protectli: VP4670
- Siemens: MC EHL4
- Siemens: MC EHL5
- System76:lemp11
- System76: oryp10
- System76: oryp9
If you are interested in knowing more about this new version of CoreBoot 4.18, you can consult the details In the following link.
Get CoreBoot
Finally, for those interested in being able to obtain this new version of CoreBoot they can do it from their download section, which can be found on the official website of the project.
In addition to that in it they will be able to find documentation and more information about the project.