Micro Magic has a new RISC-V core, and it is very interesting ...

Micro Magic RISC-V

Micro Magic Inc. is a Californian company focused on providing EDA tools. Founded in 1995, and sold in 2004 to Juniper Networks. Its founders are Mark Santoro and Lee Tavrow, both with experience, having worked together at Sun Microsystems leading the development of SPAR microprocessors. Santoro also worked at Apple, under Steve Jobs.

And now it has jumped into the news due to claiming to have the RISC-V based kernel fastest in the world. And not only does it seem to have an exceptional performance, it is also very energy efficient speaking, since its consumption is quite moderate. Something that could be interesting for mobile devices.

The company made a short announcement at the end of October 2020. It showed that they had achieved a core based on the 64-bit ISA RISC-V and that it was capable of speeds of up to 5 Ghz at 1.1v. In addition, the figures obtained in some benchmarks were really promising, showing that RISC-V can perform as much or more than other current mature ISAs. It's just a matter of creating a suitable microarchitecture ...

When analyzed on these performance benchmarks, marks such as 13.000 points in CoreMarks. A single Micro Magic core running at nominal 0.8v could also deliver 11.000 CoreMarks points @ 4.25Ghz, consuming only 200mW.

The image you can see in the article is an Odroid board with a Micro Magic chip running at 4,327 Ghz at 0.8v and 5.19Ghz at 1.1v. A sample provided by Andy Huang, Micro Magic advisor, for the medium EETimes.

And if that sounds like a lot to you, wait until you see the comparisons they have made using the index as a reference. EEMBC. In that case, you get a score of 55.000 CoreMarks per watt for this RISC-V. On the other hand, if compared to a Apple Silicon, the M1, this one would get only 10.000 CoreMarks in terms of EEMBC. In other words, the Micro Magic chip would surpass that of Apple in that sense. Also, if you divide that by 8 cores of this SoC and 15W, it would total less than 100 CoreMarks per watt.

From Micro Magic they have also wanted to demonstrate more to this medium. And they have compared the RISC-V based chip with the Arm Cortex-A9. Under those EEMBC benchmarks, the quad-core Cortex-A9 achieves a figure of 22.343 CoreMarks, which if divided between those four cores and 5W per core, you get just 1112 CoreMarks per watt. That is, the Micro Magic chip would come out victorious again.

Huang went on to explain these marks and the importance of performance per watt. And it is that they are really important for current mobile devices that depend on a battery, and even other sectors of the industry where consumption is important. With the 200mW consumption of the Micro Magic chip, up to 25 RISC-V cores could be put in for a typical consumption of 5W. That would be a great thing, since few can now boast of having chips with that many cores in mobiles (currently there are QuadCore or OctaCore chips).

Huang also stated that although they are an EDA service company currently, they intend to offer their RISC-V core designs to customers under IP licensing. In this way, other companies will be able to use them to scale their designs adapted to the sector they need (automotive, mobile devices, PC, data centers, ...).

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